/* 20bsp.cdf - BSP-specific component descriptor file */

/*
 * Copyright (c) 2014-2017 Wind River Systems, Inc.
 *
 * The right to copy, distribute, modify or otherwise make use
 * of this software may be licensed only pursuant to the terms
 * of an applicable Wind River license agreement.
 */

/*
modification history
--------------------
31oct17,g_x  use INCLUDE_MARVELL_PHY instead of INCLUDE_GENERICPHY (V7PRO-4024)
13sep17,g_x  add EMIO GMII support for GEM driver (F6169)
22may17,g_x  add INCLUDE_SYS_MEM_MGMT for un-cached IPNET tx buffer (V7PRO-3580)
03mar17,y_f  added OP-TEE 2.3.0 support (F8659)
07dec16,mca  Break hard dependency between END and IPNET (US85582)
15jul16,yya  added TrustZone support component (F6283)
17may16,sye  use GTC as timestamp by default (V7PRO-3079)
25nov15,yya  updated default IMA_SIZE (V7PRO-2531)
10oct15,sye  updated INCLUDE_END dependency (V7PRO-2512)
25apr15,y_f  updated QSPI dependencies. (V7PRO-1908)
15apr15,sye  updated I2C dependencies. (V7PRO-1959)
11mar15,yya  added NVRAM support for bootapp. (US55212)
02mar15,y_c  separated the zc706 and zc702 dts. (US51253)
22oct14,c_t  update DTS_FILE description. (V7PRO-812)
09oct14,cfm  corrected the RAM_LOW_ADRS
22may14,mpc  fixed build error (V7PRO-871)
21may14,my_  add bootapp support (V7PRO-855)
09feb14,mpc  created for US29317
*/

Component INCLUDE_L2_CACHE {
    NAME        L2 cache support
    SYNOPSIS    include L2 cache support
    _CHILDREN   FOLDER_MEMORY
    REQUIRES    INCLUDE_CACHE_SUPPORT  \
                DRV_CACHE_FDT_PL310
    INCLUDE_WHEN \
                INCLUDE_CACHE_SUPPORT
}

Selection BOARD_SELECTION {
    NAME        board selection
    COUNT       1-1
    CHILDREN    INCLUDE_XLNX_ZYNQ7K_ZC702       \
                INCLUDE_XLNX_ZYNQ7K_ZC706
    DEFAULTS    INCLUDE_XLNX_ZYNQ7K_ZC702
    _CHILDREN   FOLDER_BSP_CONFIG
}

Component INCLUDE_XLNX_ZYNQ7K_ZC702 {
    NAME        Xilinx Zynq7K ZC702 board support
    SYNOPSIS    Xilinx Zynq7K ZC702 board support.
}

Component INCLUDE_XLNX_ZYNQ7K_ZC706 {
    NAME        Xilinx Zynq7K ZC706 board support
    SYNOPSIS    Xilinx Zynq7K ZC706 board support.
}

Parameter RAM_LOW_ADRS {
    NAME        Runtime kernel entry address
    DEFAULT     (INCLUDE_BOOT_APP)::(0x02000000) \
                0x00100000
}

Parameter KERNEL_LOAD_ADRS {
    NAME        Runtime kernel load address
    DEFAULT     (INCLUDE_BOOT_APP)::(0x02100000) \
                0x00200000
}

Parameter RAM_HIGH_ADRS {
    NAME        Runtime kernel load address
    DEFAULT     (INCLUDE_BOOT_APP)::(0x02800000) \
                0x01000000
}

Parameter IMA_SIZE {
    NAME        IMA(Initial Mapped Area) size
    SYNOPSIS    IMA(Initial Mapped Area) will be mapped to MMU for \
                the early initialization phase before usrMmuInit(), \
                so the size should be large enough to hold the entire VxWorks Kernel image.
    DEFAULT     0x3FF00000
}

Parameter DTS_FILE {
    NAME        DTS file name to be used
    DEFAULT     (INCLUDE_XLNX_ZYNQ7K_ZC702)::(zynq-zc702.dts) \
                (INCLUDE_XLNX_ZYNQ7K_ZC706)::(zynq-zc706.dts)
}

Parameter DTB_RELOC_ADDR {
    NAME        DTB relocateds address
    SYNOPSIS    DTB(Device Tree Blob) need be relocated to one safe address
                to avoid be overwritten, so it should be below RAM_LOW_ADRS
                and the reserved start region, and enough for the entire
                DTB.
    TYPE        void *
    DEFAULT     (LOCAL_MEM_LOCAL_ADRS + 0x10000)
}

Parameter LOCAL_MEM_PHYS_ADRS {
    NAME        Local memory physical base address
    SYNOPSIS    Base physical address.
    DEFAULT     0x00100000
}

Parameter DTB_MAX_LEN {
    NAME        DTB maximum length
    SYNOPSIS    DTB(Device Tree Blob) need be relocated to one safe address
                to avoid be overwritten, so it should be below RAM_LOW_ADRS
                and the reserved start region, and enough for the entire
                DTB.
    TYPE        int
    DEFAULT     0x5000
}

Parameter ISR_STACK_SIZE {
    NAME        ISR stack size
    SYNOPSIS    ISR Stack size (bytes)
    DEFAULT     0x2000
}

Parameter DEFAULT_BOOT_LINE {
    NAME        default boot line
    SYNOPSIS    Default boot line string
    TYPE        string
    DEFAULT     "gem(0,0)host:vxWorks h=192.168.0.2 e=192.168.0.3 u=target"
}

Parameter CONSOLE_TTY {
    NAME        console serial port
    DEFAULT     0
}

Parameter NUM_TTY {
     NAME       number of serial ports
     DEFAULT    1
}

Parameter CONSOLE_BAUD_RATE {
    NAME        baud rate of console port
    DEFAULT     115200
}

Component DRV_END_FDT_XLNX_ZYNQ7K {
    INCLUDE_WHEN    INCLUDE_END
}

Component INCLUDE_ZYNQ7K_GEM_EMIO_GMII {
    NAME            Xilinx Zynq-7000 GEM EMIO GMII configuration
    SYNOPSIS        This component specifies that the enhanced network \
                    driver (END) uses EMIO to connect to an external PHY.
    REQUIRES        INCLUDE_XLNX_ZYNQ7K_ZC702 \
                    DRV_PINMUX_FDT_XLNX_ZYNQ  \
                    DRV_END_FDT_XLNX_ZYNQ7K
    _CHILDREN       FOLDER_BSP_CONFIG
}

Component INCLUDE_MARVELL_PHY {
    INCLUDE_WHEN    INCLUDE_END
}

Profile BSP_DEFAULT {
    PROFILES   PROFILE_OS_DEFAULT
}

#ifndef _WRS_CONFIG_OPTEE_LIB
Component INCLUDE_VXB_AUX_CLK {
    REQUIRES    += DRV_TIMER_FDT_ZYNQ7K
}
#endif  /* _WRS_CONFIG_OPTEE_LIB */

Component DRV_I2C_FDT_ZYNQ7K {
    REQUIRES    += DRV_I2C_PCA954X
}

Component DRV_I2C_PCFRTC {
    REQUIRES    += DRV_I2C_FDT_ZYNQ7K
}

Component DRV_I2C_EEPROM {
    REQUIRES    += DRV_I2C_FDT_ZYNQ7K           \
                   INCLUDE_EEPROMDRV
}

Component INCLUDE_SPI_BUS {
    REQUIRES        += DRV_QSPI_FDT_ZYNQ7K
}

/* override for bootapp NVRAM support */

Component INCLUDE_BOOTAPP_NVRAM_SUPPORT {
    REQUIRES     += INCLUDE_BOOTAPP_GENERIC_NVRAM \
                    DRV_I2C_EEPROM                \
                    DRV_I2C_FDT_ZYNQ7K
    PROTOTYPE    += IMPORT STATUS bootAppGenericNvRamSet(char *, int, int); \
                    IMPORT STATUS bootAppGenericNvRamGet(char *, int, int);
    INIT_RTN    bootAppNvRamSupportInit(bootAppGenericNvRamSet, bootAppGenericNvRamGet);
}

Component INCLUDE_SYS_MEM_MGMT {
    NAME            IPNET Memory Management Component
    SYNOPSIS        IPNET memory management component is used to manage the \
                    buffer allocation/reclaim, so specific MMU attributes can \
                    be assigned to the buffer. 
    PROTOTYPE   +=  IMPORT void *zynq7kNetMalloc (size_t size); \
                    IMPORT void zynq7kNetFree (void *addr);
    _CHILDREN       FOLDER_MEMORY
    INCLUDE_WHEN    DRV_END_FDT_XLNX_ZYNQ
    CFG_PARAMS      SYS_MALLOC \
                    SYS_FREE
}
 
Parameter SYS_MALLOC {
    NAME            IPNET Memory Allocation Function
    SYNOPSIS        This parameter specifies a memory allocation function for \
                    IPNET.
    TYPE            FUNCPTR
    DEFAULT         zynq7kNetMalloc
}

Parameter SYS_FREE {
    NAME            IPNET Memory Free Function
    SYNOPSIS        This parameter specifies a memory free function for IPNET.
    TYPE            FUNCPTR
    DEFAULT         zynq7kNetFree
}

Parameter BOOTAPP_GENERIC_NVRAM_NAME
    {
    DEFAULT     "/eeprom/0"
    }

Parameter BOOTAPP_GENERIC_NVRAM_OFFSET
    {
    DEFAULT     0x0
    }

Parameter BOOTAPP_GENERIC_NVRAM_SIZE
    {
    DEFAULT     0x100
    }

Parameter VXBFLASH_CFG_STR {
    NAME            confg string for vxbus driver based tffs partitions
    SYNOPSIS        Specifies the configuration for tffs partitions, and is \
                    composed of Flash chip strings - \
                        "<Flash chip 0 string>;<Flash chip 1 string>...".\
                    And Flash chip string is composed of following information \
                        "$<Flash instance name>#<index>:\
                         <start address>,<length>,<boot size>,<partition name>".
    TYPE            char *
    DEFAULT         (INCLUDE_XLNX_ZYNQ7K_ZC702)::("$spiflash0#0:0x0,0x1000000,0x100000,rfa0") \
                    (INCLUDE_XLNX_ZYNQ7K_ZC706)::("$spiflash0#0:0x0,0x2000000,0x100000,rfa0")
}

Parameter SYSCLK_TIMER_NAME {
    NAME        System Clock Device Name (NULL is auto-assign)
    TYPE        string
    DEFAULT     (DRV_TIMER_FDT_ARM_GTC)::("armGtc") \
                NULL
}

Parameter TIMESTAMP_TIMER_NAME {
    NAME        Timestamp Device Name (NULL is auto-assign)
    TYPE        string
    DEFAULT     (DRV_TIMER_FDT_ARM_GTC)::("armGtc") \
                NULL
}

Selection SELECT_SECURE_CONFIG {
    NAME            ARM secure mode configuration
    SYNOPSIS        ARM secure mode configuration
    COUNT           1-1
    _REQUIRES       INCLUDE_CPU_INIT_ARCH
    _CHILDREN       FOLDER_BSP_CONFIG
    CHILDREN        INCLUDE_SECURE_CONFIG_STANDARD  \
                    INCLUDE_SECURE_CONFIG_OPTEE
    DEFAULTS        INCLUDE_SECURE_CONFIG_STANDARD
}

Component INCLUDE_SECURE_CONFIG_OPTEE {
    REQUIRES        -= COMPONENT_NOT_SUPPORTED
    EXCLUDES        DRV_TIMER_FDT_ZYNQ7K \
                    DRV_TIMER_FDT_ZYNQ
}
